1. Field of the Invention
The present invention relates to a synchronizing signal control circuit and a synchronizing signal control method, and more particularly to a synchronizing signal control circuit and a synchronizing signal control method which are configured to detect a phase difference between a display synchronizing signal and an input synchronizing signal and which are configured to instantaneously effect synchronization by performing display synchronizing signal processing in which the phase difference is taken into consideration.
2. Description of Related Art
Conventionally, in a flat panel display (hereinafter referred to as FPD), and the like, a video image is displayed on a display screen on the basis of a digital broadcast signal or a signal from a DVD (Digital Versatile Disc) reproducing apparatus. In such FPD, when a synchronizing signal is disturbed by channel switching, and the like, the video image may not be correctly displayed. For this reason, a synchronizing signal control circuit is proposed in which the change of displayed video images accompanying a switching of synchronizing signals can be smoothly performed within a predetermined time period by correcting the image disturbance at the time of the switching of synchronizing signals (see, for example, Japanese Patent Application Laid-Open Publication No. 11-331638).
In the proposed circuit, the phase of a synchronizing signal of a video signal to be displayed by the switching is made to match with the phase of a synchronizing signal of a currently displayed video signal by comparing the phase of the synchronizing signal of the currently displayed video signal with the phase of the synchronizing signal of the video signal to be displayed by the switching, and thereafter the switching between the video images is performed.
Meanwhile, in the case where a movie source is reproduced by a DVD reproducing apparatus, or the like, the DVD reproducing apparatus outputs a progressive system signal (24P signal) of 24 frames per second. When the 24P signal is displayed on an FPD, the 24P signal is converted into an interlace system signal of 30 frames per second, that is, a signal (60I signal) of 60 fields per second, and thereby the video image is displayed on the display screen. This conversion processing is referred to as 2-3 pull-down conversion processing and performs processing in which four frames of the 24P signal are converted into 10 fields (five frames) of the 60I signal.
However, in the case where a permissible range of the video synchronizing signal is narrow as in the case of the FPD, and the like, there is conventionally a problem that, when an original synchronizing signal of a currently displayed video image is switched to another synchronizing signal of a movie source, and the like, it takes much time to effect synchronization depending on the phase difference between the display synchronizing signal and the input synchronizing signal which are to be synchronized with each other. A free run synchronizing state may be caused during the time period from the setting change of synchronization until the synchronization is actually effected. Thus, there is a problem that, depending on a video image processing method, after the setting of synchronization, a video image is skipped by delay, or a repeating phenomenon of repeating the same video image is caused.